library IEEE;
use IEEE.std_logic_1164.all;

entity controller_tb is
end entity controller_tb;

architecture structural of controller_tb is
  
component controller is
	port (	clk			: in	std_logic;
		reset			: in	std_logic;

		sensor_l		: in	std_logic;
		sensor_m		: in	std_logic;
		sensor_r		: in	std_logic;

		count_in		: in	std_logic_vector (19 downto 0);
		count_reset		: out	std_logic;

		motor_l_reset		: out	std_logic;
		motor_l_direction	: out	std_logic;

		motor_r_reset		: out	std_logic;
		motor_r_direction	: out	std_logic
	);
end component;

signal  clk, reset, sensor_l_in, sensor_m_in, sensor_r_in, count_reset, motor_l_reset, motor_l_direction, motor_r_reset, motor_r_direction  : std_logic;
signal count_in : std_logic_vector (19 downto 0);


begin
  
  clk         <= '1' after 0 ns,
                 '0' after 10 ns when clk /= '0' else '1' after 10 ns;
  reset       <= '1' after 0 ns,
                 '0' after 14 ns;
  sensor_l_in <= '0' after 0 ns,
                 '1' after 500					  ns; 
  sensor_m_in <= '0' after 0 ns,
                 '1' after 300 ns,
                 '0' after 500 ns,
                 '1' after 700 ns;
  sensor_r_in <= '0' after 0 ns,
                 '1' after 200 ns,
                 '0' after 300 ns,
                 '1' after 400 ns,
                 '0' after 500 ns,
                 '1' after 600 ns,
                 '0' after 700 ns,
                 '1' after 800 ns;
  count_in	  <= "00000000000000000000" after 0 ns;
  count_reset <= '0' after 0 ns;
  
  lbl0: controller PORT MAP ( clk, reset, sensor_l_in, sensor_m_in, sensor_r_in, count_in, count_reset, motor_l_reset, motor_l_direction, motor_r_reset, motor_r_direction);
    
end architecture structural;